How does the Fetch-Decode-Execute-Reset (FDER) cycle work?

How is this different to the Fetch-decode-execute (FDE) cycle?

I have an understanding of the FDE cycle and how the CPU works, although I came across a FDER cycle, when reading about the CPU scheduling and the the methodology regarding process swapping using process control blocks.

There was limited information on the actual workings of the FDER cycle – which I will appreciate if you can help me with?

I presume it sort of resets the registers, although I am not sure?

Thank you for your help.

Reference: A/AS Level Computer Science for OCR (p43) – used for self-study.