My challenge is to derive three mapping scenarios separately for each memory module of the MPEG-4 to the 2-D mesh, so each task is mapped to a different core, and tasks are executed in parallel.
Here is the graph of tasks – blue circles and rectangles represent memory modules:
And this is given NoC with 15 routers:
Purple boxes represent routers, to every router a core is connected, every router can either be a memory module(SRAMS or DRAM) or a task(purple circles). The goal is to assign tasks to different cores or memory modules to different routers according to given constraints. Given constraints: idle cores are omitted; all memory modules are fixed to their positions, so there will be 3 cases because every case will include only one specific memory module in its topology. For now, I need to figure out how to map all of them and get 3 paths from the first task(no idea about the order of tasks) to destination(memory module).
It is unclear to me how can I assign a task to one of the routers, I mean how should I choose the router for each task. If in the first case, we mapping SRAM1, then there should be only two tasks RAST and MED CPU? If so, then which routers I should pick and how should I choose the path and order of tasks
I have already read a few articles describing similar problems, but authors were using different methods to solve it, so I am still a bit confused and do not really understand how to start. I would be really grateful if you could guide me through or advise me on literature sources to look up.
Not sure if this question is appropriate for StackOverflow concept, if not – let me know where I can post this, or maybe there is a separate thread for similar topics, please.